Thin-film transistors (TFTs) are often used to produce integrated circuits having reduced areas. For example, a TFT may be used as the P-channel transistor in a six 6-transistor static random access memory (SRAM) cell. A P-channel polysilicon transistor in a six transistor SRAM cell is well known in the prior art, see U.S. Pat. Nos. 5,135,888; 5,187,114; and 5,204,279; each of which are incorporated herein by reference.
Typically, a TFT is a field-effect transistor (FET) having its channel, drain, and source regions formed from a strip of semiconductor material, such as polysilicon, that has been formed on a dielectric substrate, such as SiO.sub.2, quartz or glass. Thus, unlike a conventional FET that is formed in a semiconductor substrate, a TFT may be formed in a stacked arrangement, above a semiconductor structure, such as the other transistors in an SRAM cell. Such stacking of integrated-circuit components often provides a significant reduction in the area of the integrated circuit. Murakami et al. teach a stacked transistor SRAM cell in their article titled "A 21 mW CMOS SRAM for Battery Operation," ISSCC, pg. 46 (1991) presented on behalf of Mitsubishi Electric.
However, a TFT is often larger than its single-crystal counterparts, i.e., transistors in a single-crystal semiconductor substrate. Additionally, the switching speed of a TFT is often too slow for certain applications.